Browsing by Author "S Ponmalar"

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    Design of Power Gating Technique Using Neural Functions for Signal Compression and Decompression
    (2014-07-31) S Ponmalar; Vasantha Kalyani David
    The goals for computational problems are achieved by Artificial Intelligence. This intelligence based on mathematical equation and artificial neurons. The main focus is on the implementation of chip layout design and this is trained using Power Gating (PG) Technique in analog domain with new technique to produce power to the CMOS board using VLSI application. The Analog components used are Gilbert Cell Multiplier (GCM), Neuron Activation Function (NAF) and Adders for the implementation. The Existing system consumes designing of Signal Compression and Decompression using Back Propagation (BP) Algorithm of Neural Networks (NN).Back Propagation uses a digital computer to calculate weights while the final network being hardware loses its plasticity. Moreover the calculation is slow and training speed is also slow. Hence Power consumption is high and overall delay is high. Compression and Decompression is done in lossy data and not to lossless data. The Proposed system consumes Power Gating Technique and this reduces power and overcomes the disadvantage of the existing system. Signal Compression and Decompression are designed using Power Gating Technique. Layout Design and Verification of the Power Gating Technique carried out using Micro wind 2.6 (Back-End tool).The Technology used in the designing layout is 0.12 Micrometer Technology.